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Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Cyclone V: Dynamic phase shift

I am implementing this using the PLL Intel FPGA Megafunction (ALTERA_PLL) Is this the best IP to use where I wish to adjust phase relationships? I can't find any documentation to suggest the phase ...
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Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Thanks for the reply.

Although the input and output frequencies are both 50MHz, I can see under "Advanced Parameters" the "PLL Output VCO Frequency" is "300.0 MHz".

So I assume from that there should be 48 steps.

FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
2 years ago
Hi,
you find the phase step information for all PLL outputs in compilation report/fitter/resource section/PLL usage
  • Mikexx's avatar
    Mikexx
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Many thanks, I can confirm the PLL Usage Summary does say the PLL VCO Frequency is 300MHz.

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