Forum Discussion
ContributorCyclone V custom board VCCIO puzzling behavior
There are new measured data.
If I attached a simple 10k resistor to the 1.2V rail. it will drop back to normal 1.2 range.
But the loaded /w 10k is still measuring 40mV higher than unloaded DCDC w/o the FPGA chip.
So there are some leakage current inside the diode path? from VCCPD to VCCIO?
Super ContributorHi,
I designed with Cyclone V nine years ago but don't remember a similar issue.
Is VCCIO 1.2V node completely floating or has it relevant load? Presumed it's true that Cyclone V is actually driving out on VCCIO due to VCCPD leakage current and not powered by a different path, I would try to determine the actual leakage current, both for nominal 1.2V and 0V level. There's no leakage specification in datasheet, I would not exclude a small leakage current, e.g. below one or maximal a few mA which could be easily dropped by a pull-down resistor.
Of course, if such effects exists, they should be mentioned in datasheet and user manual.
Regards
Frank
ContributorFirst you mentioned you had design Cyclone V before.
I make the following assumptions that should make sense and should "NOT" be violate the device inherent silicon design.
1) according to handbook:
In the Cyclone V devices, all I/O banks have individual VCCPD with the following exceptions:
• Cyclone V E, GX and GT devices:
• Banks 1A (if available) and 2A share the same VCCPD.
• Banks 3B and 4A share the same VCCPD.
• Banks 7A and 8A share the same VCCPD.
• Cyclone V SE, SX and ST devices:
• Banks 1A (if available) and 2A share the same VCCPD.
• Banks 3B and 4A share the same VCCPD.
• Banks 6A and 6B share the same VCCPD.
So the rules should follow VCCPD = 2.5V if VCCIO <= 2.5V else VCCPD === VCCIO
2) the same puzzling bank is tested with 1.8V 2.5V which shows no such behavior on the same gear.
3) So if VCCPD is causing such issue why 1.8V is not having such behavior? aka increase on voltage.
