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Altera_Forum
Honored Contributor
12 years agoAlso, when you using 2-lane mode, it mean you need more lvds pins. You said that you used 16 pair lvds in you first post. So i think you want to use one Cyclone V FPGA device to process 2 LTM9011 (each has 8 channels). So if you use 2-lane mode, you need prepare 32 pairs lvds pin.
Another question is that you need at least 4 lvds module, if you use altera's lvds module to receiver these two ADCs data. So the question can four lvds modules be implemented inside one FPGA. Otherwise, you need to design the lvds receiver using user logic instead of Altera's lvds megafunction.