Forum Discussion

Occasional Contributor

3 years ago

CYCLONE V - HPS and I2C Peripheral Pin

Hi Community I'm testing the I2C interface embedded in CycloneV - HPS. - However, if I export peripherals signals through the HPS I/O Set everything works pretty well. - But If I switch to FPG...

Generic Io

tehjingy_Altera

Regular Contributor

3 years ago

Hi Stefano

Could you try following the example of the i2c buffer from the project below?

https://www.intel.com/content/www/us/en/docs/programmable/683126/21-2/i2c-controller-signal-description.html

It was suggested by the engineering.

It is using bufif1

Regards

Jingyang, Teh

Forum Discussion

CYCLONE V - HPS and I2C Peripheral Pin

Recent Discussions

intel_onchip_Memory II RAM: r/w doesn t work from FPGA but from HPS

Power Rating Required for RZQ Resistor on Cyclone V SE

MAX 10. No 3.0 V Schmitt Trigger I/O standard

Arria 10: Remote Update may brick FPGA and Factory Fallback won't work

Unable to program EPCQ16A on custom cyclone IV board - error during jic flashing.