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Honored Contributor
Honored ContributorCyclone V - EMAC ARP receive error
I have connected a Micrel KSZ8864 PHY (10/100MBit, MII Interface) to the EMAC0 on a MCV Coremodule (Cyclone V). The MII interface of the PHY is routed through the FPGA and the communication with the ...
Altera_ForumHonored Contributor
Honored ContributorI have found the problem - there is a bug in the U-Boot Version 2016.03. The following description was copied from the actual Git repository:
Thus far, the socfpga init code had hard-coded the configuration of the ethernet PHY interface to RGMII in the ethernet registers in sysmgr space, so PHYs connected in another modes did not work.
