Cyclone lll LVDS IO

We had four lvds outputs driving a receiver on another board, I got three channels correct but one came of the bottom of the chip and didn't have the 3 R's. It worked but caused the receiver to dissipate a lot of power because the fpga output was driving the 3 volts across a 100 ohm. We used the prototypes that way but redesigned the board to use the correct pins. The drop in power dissipation was noticeable. Fortunately for us the timing was not that critical, we were going for noise immunity.