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Altera_Forum
Honored Contributor
11 years agoCyclone lll emulated LVDS IO
Hi, Currently, we are using Cyclone lll FPGA for our application. We plan to interface LVDS output signals with sensor chip. We had assigned LVDS related O/P signal in bank 7 and bank 8(top ban...
Altera_Forum
Honored Contributor
11 years agoYou can refer to the Table 1–18. Cyclone III Devices Differential I/O Standard Specifications in the Cyclone III device datasheet for the LVDS VID, VCM and VOD specs. To ensure interface compatibility, you should make sure these specs are met.