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Altera_Forum
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11 years ago

Cyclone lll emulated LVDS IO

Hi, Currently, we are using Cyclone lll FPGA for our application. We plan to interface LVDS output signals with sensor chip. We had assigned LVDS related O/P signal in bank 7 and bank 8(top ban...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi,

To ensure the Cyclone III emulated LVDS can perform as per the specification, it is recommended to follow the resistor network. If you are not able to comply to the required resistor network, you could try to run signal integrity simulation ie with IBIS model to tell if your setup can meet your target performance.