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Altera_Forum
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11 years ago

Cyclone lll emulated LVDS IO

Hi, Currently, we are using Cyclone lll FPGA for our application. We plan to interface LVDS output signals with sensor chip. We had assigned LVDS related O/P signal in bank 7 and bank 8(top ban...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

To be more practical... guidelines are guidelines...

best to use the scope to check out the signal at your interface chip.