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Altera_Forum
Honored Contributor
13 years agoI am assured by the PCB layout guy that the exposed pad underneath the device IS connected to ground.
Does anyone have any other ideas as to what might cause this problem? Here is what I have: - the standard 10-pin programming header connected to TMS/TCK/TDI/TDO - Pullups (4k7) on TMS and TDI to VCCA which is 2.5V - Pulldown (4k7) on TCK - Pins 2 and 10 of the header are ground - Pins 4 and 6 of the header are VCCA (2.5V) - Pins 7 and 8 are no-connect - MSEL0 is connected to GND through a zero ohm resistor - MSEL1 is connected to VCCA (2.5V) through a zero ohm resistor - MSEL2 is connected to GND through a zero ohm resistor - This selects AS mode configuration (which should not matter when using JTAG mode) - CONF_DONE, nSTATUS and nCONFIG are pulled up to VCCIO (3.3V) through 4k7 resistors. I have also tried 10k resistors - nCE is pulled down to GND through a 4k7 resistor - I also have a config device connected to DATA0/DCLK/ASDO/nCSO - There is a 4k7 pullup to VCCIO on nCSO and a 22 ohms series resistor in the DATA0 line symptons - Quartus seems perfectly happy. No errors during programming. - I can also program the config device through the same JTAG connector using a JIC file and the SFL. Again, no errors from Quartus but - the design does not work. nothing. no matter how simple the design. All I/O pins seems to be at 3.3V - the CONF_DONE pin is low during configuration but only comes up to about 1 volt afterwards thanks Waljit