Cyclone III stuck at POR?

Hi,

I tried some modifications to my circuit, but it still doesn't work. It's now very close to Figure 9-3 "Single-Device AS Configuration" on page 9-13 of the Cyclone III data book:

nSTATUS is pulled-up to 3.3V with 10k

CONF_DONE is pulled-up to 3.3V with 10k

nCONFIG is pulled-up to 3.3V with 10k

nCE is pulled-down to GND with 10k

DATA[0] is connected to the EPCS4 with 22R

DCLK, nCSO and ASDO are connected to EPCS4 directly

I attached a scope screenshot. The channels are:

Ch1 (yellow): nSTATUS

Ch2 (blue): VCC33 (3.3V)

R2: nCONFIG

R3: nCE

R4: TDOP (the TDI input of the FPGA)

TDI looks somewhat strange, I already tried to cut it from TDOP and pulled it up to 3.3V, but nSTATUS still isn't released. VCC33 (3.3V) rise time is 8ms, I think this is ok, right?

Any ideas what I can try furthermore?

Regards,

Jürgen