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No, I can't.
If it is held in reset should I be able to access it via JTAG? (I don't know the answer to this and have been searching the handbook for the answer.)
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There isn't a JTAG reset pin, so you should always be able to access the JTAG chain.
Can you try using the JTAG tool from Quartus and toggling TCK, TMS, and reading out the IDCODE. Probe the board with a scope and see if there is appropriate activity on the pins.
For example, if your TDI output from the FPGA back to your USB-Blaster is broken, Quartus will not detect the device, but you should see the TCK/TMS/TDI and TDO pins on the FPGA toggle.
If you cannot get any activity on the TDO pin, then check for shorts. If there isn't one, then that would confirm that the FPGA is not responding to JTAG either.
Cheers,
Dave
Honored Contributor
