Cyclone III queries.

Many thanks for the replies. Things are clearer now.

Brad: Could you please explain to me the importance of using a Quartus project that contains at least your I/Os, PLLs, and configuration scheme and dummy logic. Before reading your post I thought just defining the I/O and checking that I had sufficient pins available would be enough at this stage. But I´m interested to know how it should be done properly and would be grateful if you could let me know of the benifits of following that approach

Also just another query or two:

I am currently doing putting together a Quartus project to see which package would suit best. In the Pin Planner I am assigning each I/O(~220) to a specific pin. I remember some time ago someone telling me that there is a way of specifiying the bank and letting Quartus do the rest of the work i.e. picking a pin. I have tried to do this by assigning a bank under "location" in the pin planner but how do I get Quartus to elect a pin within that bank? or do I have to assign them on a one by one basis?

Also I have a mixture of LVDS and 3.3V LVTTL I/O´s in the design. In the pin planner I see a range of pins Q, S and P, N. From reading Quartus help, I understand that the DQ and DQS pins (Q, S) are suited to interfacing with memory, but can also be used as general I/O e.g. LVTTL. But could they also be used as LVDS or must i only use the DIFF_p or DIFF_n pins (p, n)?

I suppose essentially what I am asking is what is the difference in DQ, DQS and DIFF_n and DIFF_p (Q,S and DIFF_p, DIFF_n)?

When I click show "differntial pin pair connections" in the pin planner it also pairs certain Q pins (DQ) with other Q pins, so for this reason I was thinking that they can also be used as LVDS but I just find it a little confusing to distinguish the difference.

Also, all of the differential pins (p, n) have the symbol saying they are only outputs. Why would this be. Where would I connect an input to?

When Altera say for example a certain FPGA has 347 I/O pins as in this case. Where can I find a break down of this i.e. how many differential I/O´s. I have been unable to find anything. Perhaps all the information I require is contained in the pin planner if I can understand it better.

Many thanks for the help