No, it won't - so long as you don't cause your 2.5V rail to droop. I've done several C3 designs with bank 1's VCCIO at 3.3 (since I'm using generic M25P16 SPI flash parts), and used the same 2.5V VDDA_PLL to pull up the JTAG lines.
Keep in mind that the JTAG lines aren't going to be pulling much current normally, since you are just putting in pull-ups. There is a slight chance of introducing noise, but it should be fairly low-frequency; and certainly below the minimum frequency of the PLL's. I've certainly not seen any issues with it, and I've been doing this for a while now.