Forum Discussion
Altera_Forum
Honored Contributor
17 years agoThank you for the post. I am running at very low frequency (8.192MHz), therfore, waveforms look very clean. I confirmed that using an osciloscope.
I had the probes atttached to CLK and DATA while I was programming the FPGA so if the probes are reason for clean waveforms, they were attached during the whole event. I do not think that data is wrong because with 75 us pause between the bursts the /STATUS never goes low, which should mean that all checksums are OK. I am so confused...