Honored Contributor
Honored ContributorI can add another bizarre behavior. I have custom board with 3C10. I use PS configuration using serial port of DSP processor. The serial port TX register is 32 bit wide, so I can send 32 bits at once. There is a pause between the 32 bit bursts. I took care of all the timing in few gates ( I used the same approach on several other boards with 6000 and 8000 FPGAs). If I run the FPGA configuration function, the /STATUS goes low after 84 32 bit configuration words sent out through the serial port. If I put a 75 us pause between the two 32 bit bursts, everything looks OK. The software sends all configuration bits to the 3C10 and /STATUS line stays high.
However, the /CONFIG_DONE never goes high and 3C10 never switches to user mode. I am stuck, my project is turning into a disaster and I can not do anything. I have requested Altera tech support, but they are useless. The guy insists on using JPEG port to try to program 3C10 and I keep telling him that I do not have JTAG pins connected to a connector. I have captured a bunch of serial stream waveforms, everything looks ok. I am clocking data at 8MHz rate, while the max clock speed is 133MHz. I have planty of setup and hold time. I tried another board (I have two) and it exhibited the same problem. I switched from compressed stream into uncompressed stream, it did not help a bit. I am running out of time. Can anybody help?
