Forum Discussion
Altera_Forum
Honored Contributor
18 years agoI am also seeing a problem like this.
I'm using an EPCS64SI16N to configure a CycloneIII EP3C25F324C8NES (first device) and ArriaGX EP1AGX50DF780C6N (second device). The FPGAs are constantly reconfiguring. The CONF_DONE line goes high for about 350ns, then the nSTATUS transitions from high to low and the EPCS_nCS line transitions from low to high. 310ns after that the CONFIG_DONE line goes low again. Roughly 375ns after that the nCEO of the CycloneIII goes high. The nCONFIG line stays high throughout the process. A small amount of capacitance (my scope probe is 8pF, same effect with a 20pF cap) added to the CONF_DONE line will cause a successful configuration. The DCLK signal probed at the config device and ArriaGX looks good. 10K pullup resistors are on the nSTATUS, nCONFIG, and CONF_DONE lines. I'm not sure about adding a cap to the CONF_DONE line and then calling the problem fixed. Does anyone have any more ideas on this problem? Thanks.