Forum Discussion
Altera_Forum
Honored Contributor
18 years agoNot really but here's the latest theory: Apparently there's some sort of race condition in the Cyclone 3's configuration circuitry. I mistakenly used 3.3V for the configuration voltages but the specification is for these signals (nStatus, COMF_DONE, nCONFIG, DATA1, DCLK, nCSO, ASD)) to be driven by (or pulled up to) a 2.5V standard. This may have contributed to the timing problem.
When I spin the board I'll fix the voltage AND add the capacitor; then, hopefully, I'll see what's what.