Cyclone III AS configuration bizarreness

My guess is that the device is getting some sort of configuration error... either a bad check sum or something... and asserting nSTATUS low to report the error. When I touch the nSTATUS pin to 3.3V it is being seen (by a separate piece of logic in the FPGA) as indicating that configuration did not have an error so the FPGA goes ahead and enters user mode, even though nSTATUS returns to low. Anyway, I suspect that my problem may be in the .JIC file, not the hardware.