VHDL is a hardware description language for modelling systems and designing logic.
C is a software language for writing code running on a processor.
Of course you can get various tools which convert VHDL into software and C into hardware but at the end of the day they are never going to be as good as using the right language for the right job in the first place.
If you're putting a NIOS processor into your FPGA then use C to write the software running on that processor. Use VHDL for designing the logic in the FPGA. If you're not using NIOS and you're just using the FPGA as an FPGA then use VHDL.
Of course there are a hundred and one opinions on this and you may well ressurrect another battle in the language war here; but I would add that you're doing a college project and the point of that is to learn: so try and get some experience of both languages so that you can form your own independent opinion of when to use what language.
Good luck.