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Altera_Forum
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17 years ago

Cyclone III + EPCS + Remote Update

As the title suggests, we want to implement the remote update feature using the CIII and (Active Serial) EPCS64 device. The objective is to get two application programs stored on the EPCS device, b...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Hello - I have a question about using the RSU core as well. Same situation, I am using a Cyclone III & EPCS w/ Remote Update except that I am not using a NIOS core, just user logic to both update the FLASH (via PCI) and to configure the RSU macro and enable re-config.

So, everything is in place and appears to be functioning OK, I have an image that includes signal tap and can see many of the internal signals.

When I do a write to param "100", I get a BUSY indication back from the core. When BUSY goes away, I do a read of param "100" and again see the BUSY signal asserted but the data returned is always "00000000".

I have the RD_SRC set to "00" for both the write and read - according to the liturature, this is supposed to be the current state contents in the status register.

If I keep walking through addresses, I can see the data I wrote to param "100" with RD_SRC = "00" show up at param = "100" but the RD_SRC = "11".

Any thoughts on this behavior? I am running w/ a user clock of 33Mhz and can see no limitatons for it's speed. Does anyone know if there is a maximum clock freq that can be used with this core?

Thanks

Kevin.