Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Cyclone II programming and verification using JTAG

Hi people, I'm a software engineer and quite new to Altera. For our new product we have an ARM9 processor, Flash memory connected to this processor, Linux 2,4 running and an Cyclone II FPGA f...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Thanks for the quick replies.

The mainboard containing the FPGA is to be mounted in a metal box, so no direct exposure to sunlight, but plenty of ambient and radiating (from the metal casing) temperatures.

I will propose the CRC checking mechanism to my manager. I can also ask my hardware collegue if it is possible to implement in-FPGA memory checking.

I heard from my hardware collegua, that we have a temperature sensor on-board, with which we can power down when we exceed temperature specifications.

My manager has accepted the CRC checking mechanism, but we still have some open questions :

Brad is talking of a hiccup. Can you describe what the influence of the hickup is ? Suppose I want to turn an output off during such a hiccup, is this off command executed or is it executed delayed ?

How much is the delay if any ?

Thanks again, Bart