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Altera_Forum
Honored Contributor
18 years agoCyclone II PLL Skew?
Hello, How can i determine the max clock skew on an output pin on my Cyclone II? I would like to know if clock skew could be significant enough to warrant being part of the SDC constraints for ...
Altera_Forum
Honored Contributor
18 years agoThanks Brad. I guess the jitter and skew is whatever it is at this point. I just wanted to find out how much it potentially is so i can take it into consideration in my SDC I/O constraints. Right now i'm ignoring it.
/John.