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Altera_Forum
Honored Contributor
18 years agoQuartusII has some features to assist with Finite State Machine development:
(1) "Tools / Netlist viewers / State Machine viewer" shows a graphical and table based interpretation of your synthesized state machine. This allows you to see how the tool interprets your design. Left-click to select any state and the viewer also highlights it in the state transition table; conversely you can select a state in the table and the corresponding bubble will be highlighted. The normal zoom hotkeys also work here (CNTL-Space, CNTL-Shift-Space, etc.). (2) In the report file (CNTL-R to open) under "Analysis & Synthesis / State Machines" you should see a list of any state machines in the project. For each FSM the tool shows a table of the encoded state variables. If your state machine is encoded for one-hot, note that the LSB will be inverted; this allows the register clear after configuration to place the FSM into a legal state. (3) To influence how your design is processed you can work with two assignments, both under "Assignments / Settings / Analysis & Synthesis / More Settings". The first is "Safe State Machine" which when enabled adds additional logic to account for and recover from undefined states. The second is "State Machine Processing" which controls the state bit encoding scheme.