Hi,
the difference ist
JTAG and PS requires "someone" to load data into the FPGA, which can be a Microcontroller (e.g. for PS) or the USB Blaster (e.g. for JTAG). If your design "just has the FPGA", the way to go is most likely the AS scheme, the FPGA connected to the ALTERA configuration EEPROM. As for this mode the FPGA generates the Clock for the serial interface with the configuration EEPROM itself, this option its called A(ctive) S(erial)...
Decision is easy
- FPGA shall configure on power ON without any additional controller => AS
- FPGA shall be programmed by Microcontroller (save bucks for the config EEPROM) => PS
- FPGA shall be programmed during development tests => JTAG
To be honest, I can not imagine of JTAG to be the option for in real world operating systems - but anyone can correct me on this..
For me having no other controller besides the FPGA, I use AS mode.
HTH,
Carlhermann