Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCyclone 3 migration from EPCS64 to EPCS128
Hello all,
In our design, we are using successfully the EP3C10 and EPCS64 configuration device (AS mode). We need to switch to the 128Mbit device (EPCS128); the FPGA fail to config in that case: the FPGA reads the flash status register, the flash electronic signature and then read the RBF header; it fails at this point. We know there is a difference in the way the flash electronic JEDEC signature is read (RES command not supported in 128Mbit device). How do we tell the Cylone III device to use the RD_ID command (read identification) instead of the RES command (read electronic signature)?14 Replies
Altera_ForumWell, I'm glad you were able to find a work around. I haven't had to use the EPCS128 yet, so I haven't ran into that particular issue yet..
Have you opened a service request on this with altera? If they haven't tested this configuration, they'll need to either fix it in Quartus II 8 .0 or put an errata sheet out on the Cyclone III family and fix it in a later die rev.- Altera_Forum
Thanks anakha, we've already tried to change configuration device from "auto" to "EPCS128" without success; in fact the 2 .rbf are identical.
In this document: "chapter 10. configuring cyclone iii devices (http://www.altera.com/literature/hb/cyc3/cyc3_ciii51010.pdf) (ver 1.1, jul 2007, 1,419 kb)", there is nothing related to the EPCS128 support BUT in this one: "chapter 4. serial configuration devices (epcs1, epcs4, epcs16, epcs64, and epcs128) data sheet (http://www.altera.com/literature/hb/cfg/cyc_c51014.pdf) (ver 3.0, aug 2007, 685 kb)" they do confirm that EPCS128 devices should work with EP3C10 FPGA. Since the EPCS128 doesn't respond to Flash "Read Silicon ID" command (ID=0xFF), we did a patch with a CPLD that make the Flash respond to this command with ID=0x12 (EPCS4 ID) and the FPGA successfully configured (eureka!). My conclusion: the EPCS128 is not supported by the EP3C10F256C8 (this is the flavor we use) with a bitstream built with Quartus II v7.2 SP3. Either one of the following:- There is an errata that I'm not aware of for the EP3C10F256C8 (we will try the EP3C10F256I7 next week).
- The doc is wrong and the 128Mbit device have never been tested with the EP3C10F256C8 FPGA.
- There's something in Quartus II tool that I'm not aware of.
- We also tried with a Spansion 128Mbit flash without success, electronic ID in that case = 0x17.
- We also tried with Cyclone II EP2C20F256C6N wihtout success (different board).
- Altera_Forum
Have you selected the EPCS128 as your target configuration device?
IE in your Quartus project, under Assignments->Device->Device & pin options-> Configuration->Use Configuration device select the EPCS128 instead of Auto. (I think you need to rebuild after this) This may help. - Altera_Forum
The Quartus configuration handbook clearly states that EPCS128 can be used with all Cyclone III devices. This implies, that CIII configuation controller is capable of performing the different commands needed with EPCS128. Either this information is incorrect or configuration with EPCS128 fails for reasons not related to differences in software interface.
