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Altera_Forum
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12 years ago

cyclone 3 and odd pin behavior

Using EP3C40F324I7N andEPCS16 in 'jic' setup. 'appears' only one pin, outputting a clock, D7, when programmed by the EPCS16, outputs a 'high' instead of a clock. (as apposed to low for un-assigned pi...
Altera_Forum's avatar
Altera_Forum
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12 years ago

You've confused me now....:confused:

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drill out the via feeding that pin and then patch in a clock from another source

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I thought we were discussing an FPGA pin (D7) configured as an output?

Configuring a pin as an input (providing there is no other load/drive on the net it's attached to) may well result in it going high thanks to internal pull-ups. In the FPGA's non-configured state it may well also appear high for the same reason.

If it drops to zero when you configure it with a .sof image, then either a) you've specified in your design for it to drive low; or b) you've not assigned a function to that pin but told Quartus to reserve all unused pins: 'As output driving ground', as specified in the project's Device and Pin Options.

Is this all moving away from your original issue?

Regards,

Alex