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Altera_Forum
Honored Contributor
12 years ago --- Quote Start --- How are your MSEL pins strapped? Are they configured for AS (Active Serial) configuration? You won't get a clock out of the FPGA's DCLK pin (to drive the EPCS) unless they are configured correctly. In that device pin D7 is a general purpose I/O pin. You're not expecting it to be DCLK, are you? Regards, Alex --- Quote End --- Left out, the rest of the chip appears to work. getting expected results from other outputs.