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Altera_Forum
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17 years ago

Cyclone 2 + MLVDS transciever = PLL problem?

Hi We are using a NIOS2 processor and some VHDL code inside a Cyclone 2 240 pin package. Connected to the FPGA are 2 SRAM chips, EPCS16 and a couple of MLVDS transceivers, namely MLVD080 and MLVD...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Well we have a board ready to be sent for production but since the cost for prototypes is a bit high we decided for now to stick with the current solution. Which means it'll rear its ugly head when we least expect to :)