Cyclone 10 LP Remote Update Simulation

Aiman,

So am I understanding correctly that the IP library files that Questa uses to compile the remote update core don't support simulation? I don't understand why Intel would include a remote update core in its simulation library that isn't intended to be simulated??? I understand the intent of the example is to demonstrate the functionality on hardware, but what stops it from working in simulation? I believe I have provided the required testbench and stimulus for the design to simulate properly. The output waveform I provided in my original post seems to work fine with the exception of the read data being returned by the remote update core.

Thanks

Brad