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Altera_Forum
Honored Contributor
13 years agoCYCLON IV GX - ALTGX Won't recieve any valid data
Hello I'm new in the forum, seems like very nice one me and my partner working on a final project for the university engineering degree. We have designed and manufactured two printed circu...
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- it seems that now we keep getting random noise on one of the parallel output bits, it keeps chaging where this "noise" appears bit-wise but it is always there, it comes to the point where I send A5 and the receivier gets "A4" constant and then randomly the LSB jumps to '1' for a bit and then falls again. do you have any idea about this? --- Quote End --- Perhaps you have the receiver CDR in lock-to-reference mode? The CDR PLLs are supposed to be started in lock-to-reference (LTR), and then transitioned to lock-to-data (LTD). If you've left your receiver in LTR mode, then it might work sometimes, but not others. Cheers, Dave