Forum Discussion
Altera_Forum
Honored Contributor
12 years agoyeah dave it's fpga to fpga, were using an LVDS rx input, could that be causing problems? we had to do the pin assignment workaround (setting it to 1.5PCML) (we're using quartus 11.1),external termination, all voltages are fine.
also the logic levels are beautiful, really stable.