Critical Warning (16248): pin is placed too close with ADC pins.

Device: MAX 10 10M08DAF256C8G

Quartus version: 16.0.1 build 218

I kept receiving this critical warning message even I removed lots of redundant pin assignments to keep my design at a minimal level.

"Critical Warning (16248): Pin is placed too close with ADC pins. I/O pins place too near to ADC pins will cause performance degradation on ADC sampling. Please reassign the pin assignment further away from ADC pins and re-run the compilation again."

The pin reported in this error was Pin K5. Pin assignment was attached here.

I did a search and found this link:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd03032016_970.html

Pin K5 is not in Bank 8, so I don't worry too much about it. For curiosity, I build the design with Quartus 18.0 but I still got the same critical warning.

Overall, I am running out ideas to fix this critical warning in Quartus 16 which doesn't make sense to me, since I have an original design which used the same set of pins in addition to more pins and didn't encounter this critical warning at all.

Thanks for your help.