Forum Discussion
Honored ContributorCreating HDL Design File from tdf Files for use in ModelSim
I am trying to simulate a Quartus ii v12 Web project using ModelSim-Altera Starter Edition. The Quartus project contains both bdf and tdf files, and lpm_counters created using the MegaWizard Plug-In Manager. When I attempt to do a simulation using a .v file created from the top level bdf file I get errors that say I am missing .v files for .tdf files in the Quartus project. I have tried to create the .v files for them but when the .tdf file is open in Quartus and go to File -> Create/Update the "Create HDL Design File from Current File..." option is grayed out. It is not grayed out for qsf files I create from the tdl files, but the .v files I create this way are not useful to ModelSim-Altera.
How are the .v files created from tdf files for use in ModelSim?3 Replies
Altera_Forumyou cant. You will have to write them in verilog by hand.
- Altera_Forum
Does this mean this project should have been written in VHDL or Verilog instead of AHDL to begin with?
Why won't Altera support simulating AHDL? Is AHDL obsolete? - Altera_Forum
AHDL is obsolete in that altera recommend using either VHDL or Verilog (and they have recommended this for several years). You were never able to simulate AHDL or graphical files - you were only able to simulate the post place and route deisng.
So yes, it is recommended all new designs are written in VHDL or Verilog.
