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Altera_Forum
Honored Contributor
Honored ContributorCreating delay using logic?
Hello again, My latest challenge involves generating an SPI clock from an incoming stream of SPI data. I've been successful in getting the MAX II to produce the SPI clock, however the data...
Altera_ForumHonored Contributor
Honored ContributorNope, not to worry. I fixed it by delaying my clock generation with a shift register.
