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Altera_Forum
Honored Contributor
Honored ContributorCreating delay using logic?
Hello again, My latest challenge involves generating an SPI clock from an incoming stream of SPI data. I've been successful in getting the MAX II to produce the SPI clock, however the data...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- generating an SPI clock from an incoming stream of SPI data --- Quote End --- It's neither clear, what you exactly want to achieve, nor what you are actually doing. The above description sounds like CDR (clock-data recovery), but it won't work with SPI in general, because SPI has no guaranteed clock edges. The problem would be clearer, if you showed some waveforms and your basic circuit, I think.
