Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Create NIOS system with SRAM

Hi. I started to work with FPGA and Altera system about 2 month ago and as soon as I thought I start to understand something, I'm in dead end.....AGAIN! I think my problem is still that I don't...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

It is the same with Sopc Builder. The interconnection fabric will assert the read and write signals only on one slave, depending on the address you use. In order to find out what is going on with your system I recommend to use signaltap and monitor the signals simultaneously on your masters and your slaves, to see what is going on.