create_generated_clock

Quartus has an option to convert gated clocks to clock enables.

create_generated_clock constrains are used when

a) you use logic to divide a clock's frequency

b) you use a PLL do derive a clock (although the derive_pll_clocks command does it automatically for you)

c) you need to constrain a source synchronous interface (ie, you need to create a derived clock at the pin)

d) ... probably a bunch of other situations