CPLD VHDL problem

Here is the code I am trying to to get to work:

I am interested in the read condition when state_rd_fifo changes state:

process(reset_n,clk,state_rd_fifo,

proc_data(15 downto 0),

proc_addr(15 downto 0),

proc_cs2_n,

proc_rw_n,

state_rd_fifo)

variable end_fifo_24_words : integer range 0 to 30 := 0;

begin

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-- main reset

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if reset_n='0' then

proc_data <= "ZZZZZZZZZZZZZZZZ";

state_rd_24bits <= idle_state;

read_uart_24 <= '0';

fifo_enable_read <= '0';

fifo_enable_write <= '0';

end_fifo_24_words := 0;

state_rd_fifo <= state1;

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-- start decode chip select and decode address input with a WRITE

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elsif rising_edge(clk) then

if (proc_cs2_n='0' and proc_rw_n='0') then

case proc_addr(15 downto 0) is

when "0000000000001110" =>

case state_wr_24bits is

when write_byte_1 =>

temp_word_24_0(23 downto 8) <= proc_data (15 downto 0);

state_wr_24bits <= write_byte_2;

when write_byte_2=>

temp_word_24_1(23 downto 8) <= proc_data (15 downto 0);

if(tx_ready_0 ='1') then -- now write the 24 bits to uart

start_tx_0 <= '1';

tx_data_register_24bit_0 <= temp_word_24_1(23 downto 8) &

temp_word_24_1(7 downto 0);

tx_write0 <='1' ;

state_wr_24bits <= write_byte_1;

end if;

end case;

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-- start decode chip select and decode address input with a READ

--------------------------------------------------------------------------------

elsif (proc_cs2_n='0' and proc_rw_n='1' ) then

case proc_addr(15 downto 0) is

when "0000000001010010" => proc_data (15 downto 0) <= X"2357";

when "0000000001010011" => proc_data (15 downto 0) <= X"5678";

when "0000000001010100" => proc_data (15 downto 0) <= X"eb67";

when "0000000001010101" => proc_data (15 downto 0) <= X"e8fd";

when "0000000001010110" => proc_data (15 downto 0) <= X"1ba5";

when "0000000001011000" =>

case state_rd_fifo is

when state1 =>

proc_data (15 downto 0) <= X"1267"; --temp_word_24_0(23 downto 8);

state_rd_fifo <= state2;

when state2 =>

proc_data (15 downto 0) <= X"f23c"; --temp_word_24_0(23 downto 8);

state_rd_fifo <= state1;

when others =>

proc_data (15 downto 0) <= "ZZZZZZZZZZZZZZZZ";

end case;

when "0000000001011010" => proc_data (15 downto 0) <= X"c438";

when others => proc_data (15 downto 0) <= "ZZZZZZZZZZZZZZZZ";

end case;

end if;

end process;