Hello Neha,
I assume the article FPGAs: System gates or logic cells/elements? can be helpful: www.eetimes.com/fpgas-system-gates-or-logic-cells-elements
A fragment from the mentioned article:
"Each LUT could be used to represent a function that would be the equivalent to some number of equivalent gates. For example, someone once told me that a 4-input LUT could be used to represent functions that were the equivalent of anywhere between 1 and 20+ regular logic gates."
I would recommend to try to implement your project in the Quartus design system for Intel/Altera MAX V family. This device family is supported via free Intel Quartus Prime Lite Edition. (https://fpgasoftware.intel.com/?edition=lite). According to my experiences with CPLD devices it is more important to have enough flip-flops. But it depends on the current project of course.
Regards,
Martin