Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCounting on falling and rising edge of clock
hi is it possible to design dual edge counter in altera , what which is possible in xilinx cool runner series reagards baba -- Xilinx --- library IEEE; use IEEE.std_logic_11...
Altera_ForumHonored Contributor
Honored ContributorYou could use a circuit , which doubles the frequency. Xilinx has it online on their sites AFAIK. The circuit produces a small spike at every signal edge. This should do.
