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Altera_Forum's avatar
Altera_Forum
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14 years ago

Could some one explain some thing in this schematic please :)

Im very new to FPGA's and am using this attached schematic to crib from. every thing makes sense apart from the following FPGA pins pins 26,81 held high to 1.2v pins 27,80 held to ground ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

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Im not quite sure what you mean here? is this some sort of resistor down to gnd? what does this achieve?

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A source termination is a resistor in series (in-line) with the clock trace, eg., device pin, then resistor, then the trace continues. This resistor should be between 20 and 40 Ohms. It allows you to match the impedance of the transmission line from the clock to the destination. It works well for point-to-point clock traces. If you do not have these resistors, and you have long traces, then you may see ringing on the clock edges. This ringing can cause issues with your design.

Cheers,

Dave