Could not find rtl_work.TB.vhd

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Leads to quartus compilation error:

Error (10481): VHDL Use Clause error at producten.vhd(4): design library "ieee_proposed" does not contain primary unit "fixed_pkg"

Error (10800): VHDL error at producten.vhd(4): selected name in use clause is not an expanded name

Error (10481): VHDL Use Clause error at pack.vhd(10): design library "ieee_proposed" does not contain primary unit "fixed_pkg"

Error (10800): VHDL error at pack.vhd(10): selected name in use clause is not an expanded name

Error: Quartus II 32-bit Analysis & Synthesis was unsuccessful. 4 errors, 1 warning

Error: Peak virtual memory: 316 megabytes

Error: Processing ended: Thu Sep 13 18:56:45 2012

Error: Elapsed time: 00:00:02

Error: Total CPU time (on all processors): 00:00:02

Error (293001): Quartus II Full Compilation was unsuccessful. 6 errors, 1 warning

I'm trying the alternative method.

PS: Properties->library-> rtl_work, if i return to erase rtl_work from the Properties->library-> rtl_work, quartus compilates ok.

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THIS ERROR IS POINTING TO MY PROJECT FILES INCLUDES!! But once again about ieeeproposed...

The pack file is this:

-------------------------------------------------------

-- Design Name : User Pakage

-- File Name : Pack.vhd

-- Function : Defines function for LFSR

-- Coder : Alexander H Pham (VHDL)

-------------------------------------------------------

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

library ieee_proposed;

use ieee_proposed.fixed_pkg.all;

USE ieee.std_logic_arith.all;

use IEEE.std_logic_unsigned.all;

package Pack is

type info is array (1 to 78) of sfixed (1 downto -16);-- 78= 8*8 + 14/16 bordes

type templates is array (1 to 9) of sfixed (1 downto -16);

end;

package body Pack is

end package body;

But also my main includes:

library ieee_proposed;

use ieee_proposed.fixed_pkg.all;

with no error.