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Altera_Forum
Honored Contributor
Honored ContributorConverting Behavioral to Gate Level
I want to convert my behavioral VHDL description to its gate level one. How can I do this using Quartus II? Regards http://www.alteraforum.com/forum//proweb/misc/progress.gif
Altera_ForumHonored Contributor
Honored ContributorI want to convert my RTL verilog description to gate-level or something like that. Some say that this can be done using the .vo file generated by Quartus. But I opened it and found nothing. It was just some instantiations from alteras components. Is there a way to do that?
