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So why we talk about a delay equal to the setup_time? Why they don't call it an earliness or something like that? Since the Output has to be ready a specific time
before the clock edge.
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set_output_delay max decides the late margin of transition and = tSU of external device assuming no board delay difference of data/clk
set_output_delay min decides the early margin of transition and = -tH of external device, with same above assumption
it is referred to latch edge while tCO (that decides early/late margin) is referred to launch edge
to be more accurate:
early margin = - min delay
late margin = clock period – max delay
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