Altera_ForumHonored Contributor16 years agoconnecting to Marvell's 88E6161Hi, I would like to connect my FPGA to Marvell's 88E6161 in order to decode and encode messages. Does someone has a reference design for it? Is there a megastructure that does this? Thanks, Nir
Recent Discussions5AGXFB7K4F40C5GCyclone V SoC 5CSXC6 Series GXB Utilization and LimitationsQuartus and power domainMCD of AGFA006R16A2E3EPower-Down Sequence Requirements for the Agilex 7 F-Series(2x F-Tile) Devices