I'm a beginner at this myself. From what I can gather the correct approach seems to be to read/write data to memory from the FPGA side and then use software in the HPS side to access Ethernet. I'm thinking of defining an interface in QSYS (not sure how to do this yet) to the HPS. The DMA controller in the HPS can use it to get the ADC data I'm using the FPGA side to collect. I'd then have a Linux driver and application software in the ARM to send that off via Ethernet.
It might also be possible to have the FPGA code write the data to HPS memory and send it off from there. I wonder if that would use more resources than having that logic implemented by the HPS DMA controller.