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Altera_Forum
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10 years ago

Connect 4 async SRAMs to FPGA

Hello this is rather a hardware question. I´d like to connect 4 asyncrone SRAM devices (250MHz NoBL Types) to a Cyclone IV FPGA. Each data signal is a point to point connection FPGA to SRAM...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Thank you for your reply. I´d like to use a Cyclone iV device (EP4CE55F23C7N). There are 4 PLLs available. I will need one PLL for LVDS interface (camera) and one PLL for clock recovery from that LVDS device. So there are only two PLLs left. Therefore it will not be possible to drive each clock with one PLL output. And there is only one PLL out from each PLL - as far as I understood. So an external clock driver is a good idea. Even more I can shift the clock phase with the PLL.

For the address lines I will add two 25ohms resistors after splitting the signal out of the FPGA near the FPGA driver pin. As i also want to use OCT feature (50ohm impedance). Is that OK?