Thank you.
Yes 'am using Cypress EZUSB device and in my case I don't need the FPGA to be operational before the processor is up.
The existing design cypress EZUSB device (IO Pins are) configured to update the EPCSxxx in AS mode for field upgrade. This was done by previous FPGA team.
Since the AS mode interface connects the FPGA as well, can I remove the EPCSxxx device and directly update FPGA every time the Cypress EZUSB device connected to Host PC. i.e configuration file will be on the HOST PC and thru Cypress EZUSB with AS mode directly update the FPGA Each time.
AS mode preferred coz to support backward compatibility as well as change need to support the PS mode.
Also is there any document which can provide more details on how to implement this will be helpful.
I new to this project and beginner in FPG