Configuring a NIOS II / SDRAM from the HPS

Your NIOS runs in HPS SDRAM, not in onchip memory ?

If HPS program is too big and runs in SDRAM, may be intersection of read/write regions both processors and slow execution.

For NIOS is better using 2nd copy of SDRAM, connected to FPGA.

If HPS see memory, where NIOS is running, it may fill there NIOS region with previously saved contents from file on SD, when NIOS work. After configuring FPGA NIOS starts from reset address and see his code is ready in SDRAM. This snapshot of working NIOS-memory will be getted also from NIOS with "semihosted" file in debugger:

int main() {
# ifdef _SAVE_CODE_TO_HOST_ && 1 // conditional include/exclude
  static bool first_run = true;
  if (first_run) {
    first_run = false;
    FILE *f = fopen("my_NIOS_sd_cod.bin", "wb");
    fwrite((void*)SDR_NIOS_ADDR, SDR_NIOS_SIZE, 1, f);
    fclose(f);
  }
# endif
  // ...ordinary working...
}

In "live" start variable first_run will be false, and saving NIOS code to host omitted.

This file "my_NIOS_sd_cod.bin" will be located on SD card together with .rbf file.